Daily Archives: April 28, 2017

Yet Another FPGA Differential Termination Example

An engineer asked me for assistance on determining the termination circuit for a Xilinx uG476 series 7 FPGA. The circuit works is slightly different manner than those termination circuits I have developed before (here and here) because there is not termination voltage, so I thought I should document my work in detail. I will be using Mathcad 15 to determining the optimal resistor values for (1) terminating the circuit in printed circuit board's characteristic impedance (Z0), and (2) ensuring that I preserve as much of the transmit signal level as possible without exceeding the input circuit's maximum voltage level. Continue reading

 
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